Σκοπός της εργασίας είναι η σχεδίαση και υλοποίηση του επεξεργαστή MIPS απλού κύκλου. Ο επεξεργαστής έχει ως είσοδο τα σήματα reset και clock, ενώ δεν έχει έξοδο.

Dear Sir I fully understand the mips architecture, i can implement the processor in vhdl or verilog, and can provide assembly test code

I am writing to express my interest in collaborating with you on your project that requires Verilog design and verification expertise. With my background in IC verification methodologies, specializing in UVM, and proficiency in HDL languages like SystemVerilog, Verilog, and VHDL, I am confident in my ability to deliver high-quality results for your project. I have successfully developed verification environments for projects such as the 10 Gigabit Ethernet MAC Core, 5-Stage Pipelined RISC-V Processor, and AXI4-Lite interface Core. My experience in functional and code coverage analysis using various simulation tools like Verdi, VCS, and Questasim ensures thorough verification of design properties and constraints.